FINFETs with wrap-around silicide and method forming the same
US9608116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2015 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Mar 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A device includes isolation regions extending into a semiconductor substrate, with a substrate strip between opposite portions of the isolation regions having a first width. A source/drain region has a portion overlapping the substrate strip, wherein an upper portion of the source/drain region has a second width greater than the first width. The upper portion of the source/drain region has substantially vertical sidewalls. A source/drain silicide region has inner sidewalls contacting the vertical sidewalls of the source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.