Patent · US Active

System and method for determining operational robustness of a system on a chip

US9612279B2 · kind B2 · utility

0Cited by

1References

29Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Albrecht Mayer · Deisenhofen, DE
Simon Brewerton · Trowbridge, GB

Key dates

Filing date	Feb 26, 2013
Grant date	Apr 4, 2017
Priority date	—
Expiry date	Nov 20, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/3177
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A system and method for determining operational robustness of a system on a chip (SoC) includes modifying one or more internal states of the SoC, during operation of the SoC, to mimic an effect which one or more disturbances have on the SoC, generating one or more signal traces that correspond to at least one internal state of the SoC after modifying the one or more internal states of the SoC, and determining if the operation of the SoC is stable based on the one or more generated signal traces.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.