Ternary content addressable memory (TCAM) with programmable resistive elements
US9613701B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Nov 18, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content addressable memory device includes a first memory cell having three programmable resistive elements coupled in parallel. The first terminals of the first, second, and third programmable resistive elements are coupled to a first node, the second terminal of the first programmable resistive element coupled to a first source line voltage, the second terminal of the second programmable resistive element coupled to a second source line voltage, and the second terminal of the third programmable resistive element coupled to a first supply voltage. A first access transistor includes a first current electrode coupled to a bit line; a second current electrode coupled to the first node, and a control electrode coupled to a word line. A match line transistor includes a first current electrode coupled to a match line; a second current electrode coupled to a second supply voltage and a control electrode coupled to the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.