Epitaxial semiconductor fuse for FinFET structure
US9613899B1 · kind B1 · utility
4Cited by
10References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Nov 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
On-chip, doped semiconductor fuses are formed in FinFET structures using epitaxial growth processes. Recesses are formed in selected portions of the fins following dummy gate removal. Semiconductor regions are grown within the recesses on exposed, opposing surfaces of the fins, merging to form an integral structure. Further epitaxial growth on the merged structure completes the semiconductor fuse. The semiconductor fuses are encapsulated by non-functional gate structures or by a dielectric fill.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.