Methods to form merged spacers for use in fin generation in IC devices
US9627389B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2016 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Jan 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
Methods to utilize efficient processes to form and use merged spacers in fin generation and the resulting devices are disclosed. Embodiments include providing mandrels separated from each other across two adjacent bit-cells on an upper surface of a dielectric layer on an upper surface of a silicon (Si) layer; forming first spacers on opposite sides of each mandrel; forming second spacers on exposed sides of the first spacers; removing the mandrels; removing exposed sections of the dielectric layer; removing the first and second spacers; forming fin-spacers on opposite sides of remaining sections of the dielectric layer; removing the remaining sections of the dielectric layer; removing exposed sections of the Si layer; and removing the fin-spacers to reveal Si fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.