Memory device command receiving and decoding methods
US9633713B2 · kind B2 · utility
2Cited by
28References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2016 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Mar 7, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods are disclosed. In an embodiment of one such method, a method of receiving command signals, the method comprises receiving command signals in combination with a signal provided to a memory address node at a first clock edge and a second clock edge of a clock signal to generate a plurality of memory control signals. The received command signals, in combination with the signal provided to the memory address node at the first clock edge and the second clock edge of the clock signal, represents memory commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.