High-voltage FinFET device having LDMOS structure and method for manufacturing the same
US9640663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2014 |
| Grant date | May 2, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high-voltage FinFET device having LDMOS structure and a method for manufacturing the same are provided. The high-voltage FinFET device includes: at least one fin structure, a working gate, a shallow trench isolation structure, and a first dummy gate. The fin structure includes a first-type well region and a second-type well region adjacent to the first-type well region, and further includes a first part and a second part. A trench is disposed between the first part and the second part and disposed in the first-type well region. A drain doped layer is disposed on the first part which is disposed in the first-type well region, and a source doped layer is disposed on the second part which is disposed in the second-type well region. The working gate is disposed on the fin structure which is disposed in the first-type well region and in the second-type well region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.