Semiconductor device and package and manufacturing method thereof
US9643838B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Feb 5, 2036 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0792
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes a substrate, an interconnection layer, an outgassing layer, and a patterned outgassing barrier layer. The interconnection layer is over the substrate. The outgassing layer is over the interconnection layer. The patterned outgassing barrier layer is over the outgassing layer. The patterned outgassing barrier layer includes a plurality of barrier structures and a plurality of openings. The plurality of openings expose a portion of an upmost surface of the outgassing layer, and a bottommost surface of the patterned outgassing barrier layer is substantially coplanar with the upmost surface of the outgassing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.