Low pressure encapsulant for size-reduced semiconductor package
US9646857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Aug 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a packaging process using a low pressure encapsulant. According to an exemplary process, an assembly including a substrate, a surface mounted device (SMD) mounted on the substrate, and a space between the SMD and the substrate is provided. The SMD has a sealed cavity biased towards the substrate. A sheet mold compound is laid over the SMD and the assembly is heated such that the sheet mold compound transitions to a liquid phase to form a molten mold compound. Next, the assembly is subjected to a vacuum that creates a negative atmosphere allowing the molten mold compound to flow towards the top surface of the substrate and about the SMD. The molten mold compound is then pressed towards the substrate at a low pressure (<=2 Mpa) such that the space between the SMD and the substrate is substantially filled and the SMD is substantially encapsulated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.