Chip stack structures that implement two-phase cooling with radial flow
US9648782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Feb 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06593
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package structure to implement two-phase cooling includes a chip stack disposed on a substrate, and a package lid that encloses the chip stack. The chip stack includes a plurality of conjoined chips, a central inlet manifold formed through a central region of the chip stack, and a peripheral outlet manifold. The central input manifold includes inlet nozzles to feed liquid coolant into flow cavities formed between adjacent conjoined chips. The peripheral outlet manifold outputs heated liquid and vapor from the flow cavities. The package lid includes a central coolant supply inlet aligned to the central inlet manifold, and a peripheral liquid-vapor outlet to output heated liquid and vapor that exits from the peripheral outlet manifold. Guiding walls may be included in the flow cavities to guide a flow of liquid and vapor, and the guiding walls can be arranged to form radial flow channels that are feed by different inlet nozzles of the central inlet manifold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.