Instruction and logic to control transfer in a partial binary translation system
US9652234B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2011 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Aug 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3887
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic optimization of code for a processor-specific dynamic binary translation of hot code pages (e.g., frequently executed code pages) may be provided by a run-time translation layer. A method may be provided to use an instruction look-aside buffer (iTLB) to map original code pages and translated code pages. The method may comprise fetching an instruction from an original code page, determining whether the fetched instruction is a first instruction of a new code page and whether the original code page is deprecated. If both determinations return yes, the method may further comprise fetching a next instruction from a translated code page. If either determinations returns no, the method may further comprise decoding the instruction and fetching the next instruction from the original code page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.