Omar M. Shaikh
8Patents
3h-index
33Co-inventors
49Inventor score
Filing activity: Dec 25, 2010 → Jun 6, 2017
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9672019B2 | Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads | Physics | 6 | Active |
| US8826257B2 | Memory disambiguation hardware to support software binary translation | Physics | 4 | Active |
| US10725755B2 | Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads | Physics | 3 | Active |
| US9542191B2 | Hardware profiling mechanism to enable page level automatic binary translation | Physics | 3 | Active |
| US9292294B2 | Detection of memory address aliasing and violations of data dependency relationships | Physics | 2 | Active |
| US9411739B2 | System, method and apparatus for improving transactional memory (TM) throughput using TM region indicators | Physics | 1 | Active |
| US9652234B2 | Instruction and logic to control transfer in a partial binary translation system | Physics | 1 | Active |
| US9558127B2 | Instruction and logic for a cache prefetcher and dataless fill buffer | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.