Method for manufacturing nanowire transistor device
US9653290B2 · kind B2 · utility
2Cited by
5References
10Claims
0Family size
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Key dates
| Filing date | Dec 13, 2016 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Dec 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a nanowire transistor device includes the following steps: A substrate is provided, and the substrate includes a plurality of nanowires suspended thereon. Each of the nanowires includes a first semiconductor core. Next, a first selective epitaxial growth process is performed to form second semiconductor cores respectively surrounding the first semiconductor cores. The second semiconductor cores are spaced apart from the substrate. After forming the second semiconductor core, a gate is formed on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.