3D NAND staircase CD fabrication utilizing ruthenium material
US9653311B1 · kind B1 · utility
8Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 2016 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | May 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide an apparatus and methods for forming stair-like structures with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked semiconductor devices. In one embodiment, a method of forming stair-like structures on a substrate includes forming a film stack including a dielectric layer and a ruthenium containing material, and etching the ruthenium containing material in the film stack exposed by a patterned photoresist layer utilizing a first etching gas mixture comprising an oxygen containing gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.