Overlay target for optically measuring overlay alignment of layers formed on semiconductor wafer
US9653404B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2016 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Aug 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/5446
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides an overlay target. The overlay target includes a plurality of first pattern blocks and a plurality of second pattern blocks. The first pattern blocks and the second patterns blocks are arranged in array by being separated by at least one first gaps stretching along a first direction and at least one second gaps stretching along a second direction. Each first pattern block is composed of a plurality of first stripe patterns stretching along a third direction, and each second pattern block is composed of a plurality of second stripe patterns stretching along a fourth direction. The first direction is orthogonal to the second direction, the third direction and the fourth direction are 45 degrees relative to the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.