Dynamic memory recovery at the sub-block level
US9659666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Aug 31, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile flash memory has bit lines spanning multiple blocks grouped into columns, where each block is connected along multiple regular columns and one or more redundancy columns. When there is a local column defect, so that the defect is not at the level of the whole block or global column, the portions of a column at an individual block can be remapped to a portion of the same block along a redundant column. Sections of multiple columns from different blocks can be remapped to the same redundancy column. Then a memory block includes a number of independently accessible sub-blocks, the process can also be implemented at the sub-block level. A dynamic, system level implementation is presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.