Methods of fabricating semiconductor devices and structures thereof
US9659778B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Jul 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a substrate having a first region and a second region. The gate material stack includes a semiconductive gate material. A thickness is altered or a substance is introduced to the semiconductive gate material in the first region or the second region of the substrate. The gate material stack is patterned in the first region and the second region resulting in a first transistor in the first region of the substrate comprising an NMOS FET of a CMOS device and a second transistor in the second region of the substrate comprising an NMOS FET of the CMOS device. The first transistor has a first threshold voltage and the second transistor has a second threshold voltage different than the first threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.