Body bias multiplexer for stress-free transmission of positive and negative supplies
US9659933B2 · kind B2 · utility
2Cited by
19References
20Claims
0Family size
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Key dates
| Filing date | Apr 27, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Jun 12, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0018
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit die includes a plurality of transistors formed in a semiconductor substrate, the body regions of the transistors on a doped well region of the semiconductor substrate. A body bias voltage generator generates a positive body bias voltage, and a negative body bias voltage in the ground body bias voltage. A multiplexer selectively outputs one of the positive, negative, or ground body bias voltage to the doped well region of the semiconductor substrate based on the temperature of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.