Semiconductor process of forming metal gates with different threshold voltages and semiconductor structure thereof
US9659937B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Apr 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28088
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor process of forming metal gates with different threshold voltages includes the following steps. A substrate having a first area and a second area is provided. A dielectric layer and a first work function layer are sequentially formed on the substrate of the first area and the second area. A second work function layer is directly formed on the first work function layer of the first area. A third work function layer is directly formed on the first work function layer of the second area, where the third work function layer is different from the second work function layer. The present invention also provides a semiconductor structure formed by said semiconductor process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.