Apparatus and method for memory calibration averaging
US9666264B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2016 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Jun 21, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for memory calibration averaging is disclosed. In one embodiment, a memory subsystem includes a memory and a memory controller. The memory controller includes a calibration control circuit that periodically performs calibrations of the memory subsystem. Calibration may be performed for a delay applied to a data strobe used to synchronized transfers of data between the memory controller and the memory, and a reference voltage used to distinguish between a logic 0 and a logic 1 during memory reads. Following the performance of a calibration, the values of the delay and the reference voltage may be set based on an average of a most recent number of calibrations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.