Kai Lun Hsiung
23Patents
5h-index
34Co-inventors
65Inventor score
Filing activity: Jan 17, 2014 → Mar 5, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10510396B1 | Method and apparatus for interrupting memory bank refresh | Emerging Cross-Sectional Technologies | 34 | Active |
| US9666264B1 | Apparatus and method for memory calibration averaging | Physics | 11 | Active |
| US10545701B1 | Memory arbitration techniques based on latency tolerance | Physics | 7 | Active |
| US10734983B1 | Duty cycle correction with read and write calibration | Physics | 7 | Active |
| US11217285B1 | Memory subsystem calibration using substitute results | Physics | 6 | Active |
| US9698797B1 | Hierarchical feedback-controlled oscillator techniques | Electricity | 4 | Active |
| US9396778B1 | Conditional memory calibration cancellation | Physics | 4 | Active |
| US9478263B2 | Systems and methods for monitoring and controlling repetitive accesses to volatile memory | Physics | 4 | Active |
| US9384820B1 | Aligning calibration segments for increased availability of memory subsystem | Physics | 4 | Active |
| US11960739B1 | Nominal distance reference voltage calibration | Physics | 3 | Active |
| US9928890B2 | System and method for calibrating memory using credit-based segmentation control | Physics | 2 | Active |
| US10175905B2 | Systems and methods for dynamically switching memory performance states | Emerging Cross-Sectional Technologies | 1 | Active |
| US10515028B2 | Reference voltage calibration using a qualified weighted average | Emerging Cross-Sectional Technologies | 1 | Active |
| US11776597B2 | Memory subsystem calibration using substitute results | Physics | 1 | Active |
| US11221798B2 | Write/read turn techniques based on latency tolerance | Physics | 1 | Active |
| US10872652B2 | Method and apparatus for optimizing calibrations of a memory subsystem | Emerging Cross-Sectional Technologies | 1 | Active |
| US11501820B2 | Selective reference voltage calibration in memory subsystem | Physics | 0 | Active |
| US10678478B2 | Ordering memory requests based on access efficiency | Physics | 0 | Active |
| US12293808B2 | Memory subsystem calibration using substitute results | Physics | 0 | Active |
| US10019387B2 | Reference voltage calibration using a qualified weighted average | Emerging Cross-Sectional Technologies | 0 | Active |
| US12118249B2 | Memory bank hotspotting | Physics | 0 | Active |
| US11403037B2 | Ordering memory requests based on access efficiency | Physics | 0 | Active |
| US12423009B2 | Concurrent write data strobe and reference voltage calibrations | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.