Semiconductor structure including a nonvolatile memory cell having a charge trapping layer and method for the formation thereof

US9673210B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Hans-Juergen Thees · Dresden, DE
• Peter Baars · Dresden, DE
• Joerg Schmid · Dresden, DE

Key dates

• Filing date: Feb 25, 2016
• Grant date: Jun 6, 2017
• Expiry date: Feb 25, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

A semiconductor structure including a nonvolatile memory cell element including an active region formed in a semiconductor material, a select gate structure, a dummy control gate structure and a transfer gate structure is provided. Additionally, an electrically insulating structure extending around each of the select gate structure, the dummy control gate structure and the transfer gate structure is provided. The dummy control gate structure is removed, wherein a first recess is formed in the semiconductor structure. After removing the dummy gate structure, a charge trapping layer and a layer of a control gate electrode material are deposited over the semiconductor structure. Portions of the charge trapping layer and the layer of the control gate electrode material over the electrically insulating structure are removed. Portions of the charge trapping layer and the layer of control gate electrode material in the recess provide a control gate structure of the nonvolatile memory cell.