Vertical semiconductor device having frontside interconnections

US9673316B1 · kind B1 · utility

Assignee

• Maxim Integrated Products, Inc. · US

Inventors

• Christopher S. Blair · Lake Oswego, US
• Albert Bergemont · Palo Alto, US
• Sudarsan Uppili · Portland, US
• Fanling H. Yang · Beaverton, US
• Guillaume Bouche · Albany, US

Key dates

• Filing date: Jun 28, 2013
• Grant date: Jun 6, 2017
• Expiry date: Jun 28, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

A semiconductor device including a VDMOS device formed therein includes a terminal, or contact, to the drain region of the VDMOS device from the frontside of the device. In one or more implementations, a semiconductor device includes a semiconductor substrate having a first surface and a second surface and a vertical diffused metal-oxide-semiconductor device formed within the semiconductor substrate. The vertical diffused metal-oxide-semiconductor device includes at least one source region formed proximate to the first surface and at least one drain region formed proximate to the second surface. A through-substrate via is formed within the semiconductor substrate, and the through-substrate via electrically connected to the drain region. The through-substrate via provides an electrical interconnection to the drain region from the first surface.