Resistive RAM and fabrication method
US9680095B2 · kind B2 · utility
3Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2013 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Jun 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
A structure for a resistive memory device and a method to fabricate the same is disclosed. The method includes providing a bottom electrode comprising a metal and forming a memory layer on the bottom electrode. The memory layer includes a first layer of metal oxide, and a second layer including the nitrogen-containing metal oxide. A top electrode is formed over the memory layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.