Fin type field effect transistors with different pitches and substantially uniform fin reveal
US9691765B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2016 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Mar 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0128
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device that includes a first plurality of fin structures in a first device region and a second plurality of fin structures in a second device region. The first plurality of fin structures includes adjacent fin structures separated by a lesser pitch than the adjacent fin structures in the second plurality of fin structures. At least one layer of dielectric material between adjacent fin structures, wherein a portion of the first plurality of fin structures extending above the at least one layer of dielectric material in the first device region is substantially equal to the portion of the second plurality of fin structures extending above the at least one layer of dielectric material in the second device region. Source and drain regions are present on opposing sides of a gate structure that is present on the fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.