Patent · US Active

Combined SADP fins for semiconductor devices and methods of making the same

US9691775B1 · kind B1 · utility

19Cited by
7References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2016
Grant dateJun 27, 2017
Priority date
Expiry dateApr 28, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D89/10
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor cell includes a substrate and an array of at least five substantially parallel fins having substantially equal fin widths disposed on the substrate. The array includes a predetermined minimum spacing distance between at least one pair of adjacent fins within the array. The array has a first n-type fin for an n-type semiconductor device, and a first p-type fin for a p-type semiconductor device. The first p-type fin is disposed adjacent the first n-type fin and spaced a predetermined first n-to-p distance apart from the first n-type fin. The first n-to-p distance is greater than the minimum spacing distance and less than the sum of the fin width plus twice the minimum spacing distance.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.