Testing apparatus and method for microcircuit and wafer level IC testing

US9696347B2 · kind B2 · utility

Assignee

• Johnstech International Corporation · US

Inventors

• John DeBauche · Mahtomedi, US
• Dan Campion · Chanhassen, US
• Michael Andres · Inver Grove Heights, US
• Steve Rott · Saint Cloud, US
• Jeffrey C. Sherry · Savage, US
• Brian Halvorson · Windom, US
• Brian Eshult · Windom, US

Key dates

• Filing date: Jul 10, 2014
• Grant date: Jul 4, 2017
• Expiry date: Jun 2, 2035

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/49826
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

The test system provides an array of test probes having a cross beam. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. The probes are biased upwardly through the retainer by an elastomeric block having a similar array of slots. The elastomer is then capped at its bottom by a second or lower retainer with like slots to form a sandwich with the elastomer therebetween. The bottom ends of the probes are group by probe height. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and take continue the circuits to a probe card where test signals originate.