Apparatuses and methods using dummy cells programmed to different states
US9697907B2 · kind B2 · utility
8Cited by
3References
27Claims
0Family size
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Key dates
| Filing date | Aug 3, 2016 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3427
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods for reducing capacitive loading are described. One apparatus includes a first memory string including first and second dummy memory cells, a second memory string including third and fourth dummy memory cells, and a control unit configured to provide first and second control signals to activate the first and second dummy memory cells of the first memory string and to further deactivate at least one of the third and fourth dummy memory cell of the second memory string.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.