Inventor · Los Gatos, CA, US

Aaron Yip

150Patents

12h-index

64Co-inventors

89Inventor score

Filing activity: Dec 29, 1995 → May 9, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7345924B2	Programming memory devices	Physics	56	Active
US7447847B2	Memory device trims	Physics	56	Expired
US7269066B2	Programming memory devices	Physics	56	Expired
US9941209B2	Conductive structures, systems and devices including conductive structures and related methods	Electricity	49	Active
US9589978B1	Memory devices with stairs in a staircase coupled to tiers of memory cells and to pass transistors directly under the staircase	Electricity	45	Active
US7778086B2	Erase operation control sequencing apparatus, systems, and methods	Physics	31	Active
US9165937B2	Semiconductor devices including stair step structures, and related methods	Electricity	20	Active
US7123521B1	Random cache read	Physics	18	Expired
US9070442B2	Memory devices with local and global devices at substantially the same level above stacked tiers of memory cells and methods	Emerging Cross-Sectional Technologies	17	Active
US8064252B2	Multi-pass programming in a memory device	Physics	17	Active
US8111549B2	Dynamic wordline start voltage for nand programming	Physics	15	Active
US5656949A	Architecture for FPGAs	Electricity	12	Expired
US5801934A	Charge pump with reduced power consumption	Electricity	12	Expired
US7924617B2	Selective threshold voltage verification and compaction	Physics	11	Active
US5920506A	Method and apparatus for bulk preprogramming flash memory cells with minimal source and drain currents	Physics	10	Expired
US10170188B1	3D memory device including shared select gate connections between memory blocks	Electricity	10	Active
US5999425A	Charge pump architecture for integrated circuit	Electricity	10	Expired
US9659950B2	Semiconductor devices including stair step structures, and related methods	Electricity	10	Active
US10978478B1	Block-on-block memory array architecture using bi-directional staircases	Electricity	9	Active
US7254049B2	Method of comparison between cache and data register for non-volatile memory	Physics	9	Active
US11545456B2	Microelectronic devices, electronic systems having a memory array region and a control logic region, and methods of forming microelectronic devices	Electricity	8	Active
US9697907B2	Apparatuses and methods using dummy cells programmed to different states	Physics	8	Active
US9589644B2	Reducing programming disturbance in memory devices	Physics	8	Active
US8547750B2	Methods and devices for memory reads with precharged data lines	Physics	8	Active
US7505323B2	Programming memory devices	Physics	7	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.