Wafer centering in pocket to improve azimuthal thickness uniformity at wafer edge
US9698042B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2016 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Jul 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68771
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for reducing slippage of a wafer during film deposition includes pumping out a processing chamber while the wafer is supported on lift pins or a carrier ring and lowering the wafer onto support members configured to minimize wafer slippage during deposition of the film. A multi-station processing chamber, such as a processing chamber for atomic layer deposition, can include a chuck-less pedestal at each station having wafer supports configured to prevent the wafer from moving off center by more than 400 microns. To minimize a gas cushion beneath the wafer, the wafer supports can provide a gap of at least 2 mils between the back side of the wafer and the wafer-facing surface of the pedestal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.