Patent · US Active

Secured computing system with asynchronous authentication

US9703945B2 · kind B2 · utility

2Cited by
30References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 13, 2013
Grant dateJul 11, 2017
Priority date
Expiry dateDec 19, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/84
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computing device includes an input bridge, an output bridge, a processing core, and authentication logic. The input bridge is coupled to receive a sequence of data items for use by the device in execution of a program. The processing core is coupled to receive the data items from the input bridge and execute the program so as to cause the output bridge to output a signal in response to a given data item in the sequence, and the authentication logic is coupled to receive and authenticate the data items while the processing core executes the program, and to inhibit output of the signal by the output bridge until the given data item has been authenticated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.