Valery Teper
14Patents
3h-index
11Co-inventors
53Inventor score
Filing activity: Apr 2, 2002 → Oct 4, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7398554B1 | Secure lock mechanism based on a lock word | Physics | 14 | Expired |
| US9343162B2 | Protection against side-channel attacks on non-volatile memory | Physics | 7 | Active |
| US9523722B2 | Method and apparatus for supply voltage glitch detection in a monolithic integrated circuit device | Physics | 3 | Active |
| US9819657B2 | Protection of memory interface | Electricity | 3 | Active |
| US9318221B2 | Memory device with secure test mode | Physics | 2 | Active |
| US9703945B2 | Secured computing system with asynchronous authentication | Physics | 2 | Active |
| US10019571B2 | Protection from side-channel attacks by varying clock delays | Electricity | 1 | Active |
| US10374791B2 | Method of protecting electronic circuit against eavesdropping by power analysis and electronic circuit using the same | Electricity | 1 | Active |
| US9455962B2 | Protecting memory interface | Electricity | 1 | Active |
| US9697310B2 | Level faults interception in integrated circuits | Physics | 0 | Active |
| US9846187B2 | Snooping detection between silicon elements in a circuit | Electricity | 0 | Active |
| US9397663B2 | Fault protection for high-fanout signal distribution circuitry | Electricity | 0 | Active |
| US9471413B2 | Memory device with secure test mode | Physics | 0 | Active |
| US9223960B1 | State-machine clock tampering detection | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.