Mapping of algorithms to neurosynaptic hardware
US9704094B2 · kind B2 · utility
7Cited by
17References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2015 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Feb 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/049
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the invention provides a method comprising defining a brainlet representing a platform-agnostic network of neurons, synapses, and axons. The method further comprises compiling the brainlet into a corelet for mapping onto neurosynaptic substrate, and mapping the corelet onto the neurosynaptic substrate. The corelet is compatible with one or more conditions related to the neurosynaptic substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.