High aspect ratio vertical interconnect access (via) interconnections in magnetic random access memory (MRAM) bit cells
US9704919B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2016 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
High aspect ratio vertical interconnect access (via) interconnections in magnetic random access memory (MRAM) bit cells are disclosed. In one aspect, an exemplary MRAM bit cell includes a coupling column interconnecting an access transistor and a magnetic tunnel junction (MTJ) therein. The coupling column is disposed across a plurality of interconnection layers. In one aspect, the coupling column comprises a high aspect ratio via. In another aspect, the high aspect ratio via is connected directly between a drain contact coupled to a drain of the access transistor and to an end electrode of the MTJ such that no interconnection line and/or interconnection island is provided in the coupling column. In certain aspects, the coupling column may be disposed between an interconnection line and an adjacent interconnection line without increasing an existing interconnection line pitch, thus allowing for a reduction in MRAM bit cell pitch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.