System solution for first read issue using time dependent read voltages
US9711231B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2016 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. In one aspect, read voltages are set and optimized based on a time period since a last sensing operation. A timing device such as an n-bit digital counter may be provided for each block of memory cells to track the time. The counter is set to all 1's when the device is powered on. When a sensing operation occurs, the counter is periodically incremented based on a clock. When a next read operation occurs, the value of the counter is cross-referenced to an optimal set of read voltage shifts. Each block of cells may have its own counter, where the counters are incremented using a local or global clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.