Methods of forming group III-nitride semiconductor devices including implanting ions directly into source and drain regions and annealing to activate the implanted ions
US9711633B2 · kind B2 · utility
10Cited by
6References
24Claims
0Family size
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Key dates
| Filing date | May 9, 2008 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Oct 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a semiconductor device include forming a dielectric layer on a Group III-nitride semiconductor layer, selectively removing portions of the dielectric layer over spaced apart source and drain regions of the semiconductor layer, implanting ions having a first conductivity type directly into the source and drain regions of the semiconductor layer, annealing the semiconductor layer and the dielectric layer to activate the implanted ions, and forming metal contacts on the source and drain regions of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.