Techniques for mapping logical threads to physical threads in a simultaneous multithreading data processing system
US9715411B2 · kind B2 · utility
6Cited by
4References
20Claims
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Key dates
| Filing date | Feb 5, 2014 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Apr 20, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for mapping logical threads to physical threads of a simultaneous multithreading (SMT) data processing system includes mapping one or more logical threads to one or more physical threads based on a selected SMT mode for a processor. In this case, respective resources for each of the one or more physical threads are predefined based on the SMT mode and an identifier of the one or more physical threads. The one or more physical threads are then executed on the processor utilizing the respective resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.