Power reduction for a sensing operation of a memory cell
US9715918B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 23, 2016 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | May 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A memory device may leverage non-volatile memory properties of a ferroelectric capacitor—e.g., that a ferroelectric capacitor may remain polarized at one of two states without a voltage applied across the ferroelectric capacitor—to activate a subset of sensing components corresponding to multiple memory cells with a common word line. For example, a first and second set of memory cells with a common word like may be selected for a read operation. A first set of sensing components corresponding to the first set of memory cells may be activated for the read operation, and a second set of sensing components that correspond to the second set of memory cells may be maintained in a deactivated state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.