Method of forming complementary metal oxide semiconductor device with work function layer
US9721840B2 · kind B2 · utility
2Cited by
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10Claims
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Key dates
| Filing date | Jun 28, 2016 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Jun 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a complementary metal oxide semiconductor device, comprising a PMOS and an NMOS. The PMOS has a P type metal gate, which comprises a bottom barrier layer, a P work function metal (PWFM) layer, an N work function tuning (NWFT) layer, an N work function metal (NWFM) layer and a metal layer. The NMOS has an N type metal gate, which comprises the NWFT layer, the NWFM layer and the low-resistance layer. The present invention further provides a method of forming the same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.