Semiconductor device test apparatuses
US9733304B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2014 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Sep 24, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Apparatus for testing semiconductor devices comprising die stacks, the apparatus comprising a substrate having an array of pockets in a surface thereof arranged to correspond to conductive elements protruding from a semiconductor device to be tested. The pockets include conductive contacts with traces extending to conductive pads, which may be configured as test pads, jumper pads, edge connects or contact pads. The substrate may comprise a semiconductor wafer or wafer segment and, if the latter, multiple segments may be received in recesses in a fixture. Testing may be effected using a probe card, a bond head carrying conductive pins, or through conductors carried by the fixture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.