Writing method for resistive memory cell and resistive memory
US9734908B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2016 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Mar 22, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A writing method for a resistive memory cell and a resistive memory using thereof are provided. In the writing method, a group of RESET signals is provided to the resistive memory cell, so as to execute a writing operation. A current of the resistive memory cell is detected to determine whether the writing operation of the resistive memory cell is completed. When the writing operation of the resistive memory cell is not completed, widths of filament paths in the resistive memory cell are determined to be narrowed or not. The voltage of word line of the resistive memory cell in the group of RESET signals is reduced when the widths of the filament paths in the resistive memory cell are narrowed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.