Patent · US Active

Process for manufacturing a semiconductor structure with temporary bonding via metal layers

US9735038B2 · kind B2 · utility

0Cited by
3References
18Claims
0Family size

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Inventors

Key dates

Filing dateAug 4, 2014
Grant dateAug 15, 2017
Priority date
Expiry dateAug 4, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a structure implementing temporary bonding a substrate to be handled with a handle substrate, including: providing the substrate to be handled covered with a first metal layer, the first layer having a first grain size; providing the handle substrate covered with a second metal layer, the second layer having same composition as the first metal layer and a second grain size different from the first grain size; assembling the substrate to be handled and the handle substrate by thermocompression assisted direct bonding on the first and second metal layers; possibly treating the substrate to be handled assembled to the handle substrate; disassembling the assembly of the substrate to be handled and the handle substrate to form the structure, including an embrittlement thermal annealing of the assembly resulting in the handle substrate being detached.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.