Patent · US Active

Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device

US9735245B2 · kind B2 · utility

3Cited by
10References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 10, 2014
Grant dateAug 15, 2017
Priority date
Expiry dateSep 10, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/601

Abstract

Some embodiments of the present disclosure provide an integrated circuit (IC) for an embedded flash memory device. The IC includes a flash memory cell having a memory cell gate. A silicide contact pad is arranged in a recess of the memory cell gate. A top surface of the silicide contact pad is recessed relative to a top surface of the memory cell gate. Dielectric side-wall spacers extend along sidewalls of the recess from the top surface of the memory cell gate to the top surface of the silicide contact pad.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.