Managing potentially invalid results during runahead
US9740553B2 · kind B2 · utility
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22References
20Claims
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Key dates
| Filing date | Nov 14, 2012 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Jan 13, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0763
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments related to managing potentially invalid results generated/obtained by a microprocessor during runahead are provided. In one example, a method for operating a microprocessor includes causing the microprocessor to enter runahead upon detection of a runahead event. The example method also includes, during runahead, determining that an operation associated with an instruction referencing a storage location would produce a potentially invalid result based on a value of an architectural poison bit associated with the storage location and performing a different operation in response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.