Semiconductor devices with varying threshold voltage and fabrication methods thereof
US9748145B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 29, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Feb 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
Semiconductor device fabrication methods are provided which include: providing a structure with at least one region and including a dielectric layer disposed over a substrate; forming a multilayer stack structure including a threshold-voltage adjusting layer over the dielectric layer, the multilayer stack structure including a first threshold-voltage adjusting layer in a first region of the at least one region, and a second threshold-voltage adjusting layer in a second region of the at least one region; and annealing the structure to define a varying threshold voltage of the at least one region, the annealing facilitating diffusion of at least one threshold voltage adjusting species from the first threshold-voltage adjusting layer and the second threshold-voltage adjusting layer into the dielectric layer, where a threshold voltage of the first region is independent of the threshold voltage of the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.