Die support for enlarging die size
US9748163B1 · kind B1 · utility
1Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Aug 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package, in some embodiments, comprises: a die flag; one or more die supports; and a die mounted on the die flag and on said one or more die supports, at least one surface of said die having an area larger than an area of at least one surface of the die flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.