Cross-point memory and methods for fabrication of same
US9748311B2 · kind B2 · utility
19Cited by
10References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2014 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Nov 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A cross-point memory array includes a plurality of variable resistance memory cell pillars. Adjacent memory cell pillars are separated by a partially filled gap that includes a buried void. In addition, adjacent memory cell pillars include storage material elements that are at least partially interposed by the buried void.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.