Patent · US Active

Method for fabricating a semiconductor device including gate-to-bulk substrate isolation

US9748404B1 · kind B1 · utility

22Cited by
14References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 29, 2016
Grant dateAug 29, 2017
Priority date
Expiry dateFeb 29, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/121
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for fabricating a semiconductor device comprises forming a sacrificial layer of a first semiconductor material on a substrate, a layer of a second semiconductor material on the sacrificial layer, and a layer of a third semiconductor material on the layer of the second semiconductor material. Portions of the layer of the deposited material are removed to form a first nanowire arranged on the sacrificial fin and a second nanowire arranged on the first nanowire. An oxidizing process is performed that forms a first layer of oxide material on exposed portions of the second nanowire and a second layer of oxide material on exposed portions of the sacrificial fin, the first layer of oxide material having a first thickness and the second layer of oxide material having a second thickness, where the first thickness is less than the second thickness.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.