Distribution of tasks among asymmetric processing elements
US9753530B2 · kind B2 · utility
2Cited by
45References
6Claims
0Family size
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Key dates
| Filing date | Sep 26, 2014 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Sep 26, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.