Substrate structure, electronic package and method for fabricating the electronic package
US9754868B2 · kind B2 · utility
7Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2016 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Mar 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.